The IIS Chip Gallery
Digital_Filter (
1987
)
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by
Mirko Bulinsky
,
R. De Moliner
,
Kurt Henggeler
Main Details
Application
Filter
Technology
3000
Manufacturer
Faselec
Type
Semester Thesis
Package
DIP40
Dimensions
3200μm x 2400μm
Gates
1 kGE
Voltage
5 V
Clock
2.5 MHz
Description
This chip realizes two digital filters with 5-bit precision.
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