The IIS Chip Gallery
Tetris (1990)
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| Application | Fun |
| Technology | 1500 |
| Manufacturer | VLSI Tech |
| Type | Semester Thesis |
| Package | DIP64 |
| Dimensions | 3200μm x 6400μm |
| Gates | 7 kGE |
| Voltage | 5 V |
| Clock | 5 MHz |
This chip is a complete implementation of the popular game Tetris. The entire flow is implemented as a 104 state FSM. The chip requires only an external LED_matrix and a score counter to function as a complete game. The difficulty of the game can be adjusted by the clock frequency. At 1 MHz, the game is fairly easy, at 5 MHz it is almost impossible to play.