The IIS Chip Gallery

PIP (2000)

by

Thomas Roewer, Manfred Stadler

Main Details

Application	Communication
Technology	600
Manufacturer	austriamicrosystems
Type	Research
Package	PGA100
Voltage	3.3 V

Description

As an example for the design of programmable intellectual property modules (PIP), a STM-1/STS3 input block was designed. STM-1 and STS3 are the 155 MHz/s hierarchies in the Synchronous Digital Hierarchy (SDH) and Synchronous Optical NETwork (SONET) standard, respectively. The goal was to design a highly parametrizable soft module that offers maximum flexibility for system integration and customerspecific features. Additionally, the module is usable in both SDH and SONET networks, without any changes to the hardware. By downloading appropriate software, its application for SDH or SONET can be selected after system integration.

Other major benefits of PIP modules that were proven by this implementation are:

• The data transfer protocol of the interfaces that connect PIP modules to their neighboring blocks can be implemented in software running on the embedded processor.
• PIP modules offer enhanced test coverage by running a software-driven BIST using deterministic patterns in addition to a random test.
• The functionality of PIP modules can be altered by a software download. So, even hard-IPs become highly flexible when implemented according to the proposed paradigm.

Related Publication

No related publications yet