The IIS Chip Gallery
Riddler (2002)
by
| Application | Cryptography |
| Technology | 600 |
| Manufacturer | austriamicrosystems |
| Type | Semester Thesis |
| Package | PGA120 |
| Dimensions | 7000μm x 7000μm |
| Voltage | 3.3 V |
This chip implements Rijndael the eventual winner of the Advanced Encryption Standard (AES) competition. This project was coupled with Serpent which implemented a second AES candidate. The design supports both encryption and decryption for a 128-bit blocks using 128-bit keys. During post processing an alignment marker was accidentaly placed in the core causing several shorts. One prototype ran after extensive microsurgery.