The IIS Chip Gallery
WoodHead (
2012
)
Additional pictures below, click to see larger versions
by
Daniel Riegger
,
Gabriel Graeni
,
Christoph Roth
,
Stefan Zwicky
Main Details
Application
Communication
Technology
180
Manufacturer
UMC
Type
Semester Thesis
Package
QFN56
Dimensions
1525μm x 1525μm
Gates
90 kGE
Voltage
1.8 V
Power
1 mW, 1MHz 1.8V
Clock
285 MHz
Description
Yet another Viterbi decoder for TD-HSPA
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