Application | Low-power |
Technology | 130 |
Manufacturer | SMIC |
Type | Research |
Package | Baredie |
Dimensions | 1638μm x 1638μm |
Voltage | 1.2 V |
Power | 9999 mW (@0.001MHz, 0.1V) |
Clock | 0.0001 MHz |
This version 0 of TimesIC is a test chip for Digital to time converter (DTC) in 130 nm for potential DPLL design, combined with proposed VCO and part of PLL loop logic.
The logo on the chip is a Chinese character meaning in ancient seal style font of Chinese. The word comes from the famous book originates concept of Yin-yang "the book of Changes" which was written 3000+ years ago. This words represents the start of time, which corresponds to the starting version of TimesIC (version 0).