|Dimensions||2000μm x 2500μm|
The chip implements the first 64-antenna beamspace receiver for all-digital millimeter-wave massive multiuser MIMO wireless systems and supports up to 16 simultaneously-transmitting users. The 2x2.5sqmm hardware accelerator is designed to exceed a record peak data rate of 60Gb/s while consuming less than 1W power. The chip's unique beamspace operation enables it to autonomously adapt the dynamic power consumption to the instantaneous channel propagation conditions.
The chip was manufactured in 22FDX with generous support from GlobalFoundries' University MPW Program.