The IIS Chip Gallery
Wormy (2024)
by
| Application | Communication |
| Technology | 22 |
| Manufacturer | GF |
| Type | Research Project |
| Package | QFN56 |
| Dimensions | 2500μm x 2000μm |
| Gates | 5 MGE |
| Voltage | 0.8 V |
| Power | 223 mW @1492 MHz |
| Clock | 1492 MHz |
The WORMY chip contains two designs: (i) MAED, the first jammer-resilient receiver that jointly performs channel estimation, jammer mitigation, and data detection in wireless systems, and (ii) two high-throughput LDPC decoders for ultra-low-latency wireless applications.
The MAED design is the first joint channel estimation, jammer mitigation, and data detector receiver in the open literature. It achieves a throughput of 100Mb/s at 223mW in an area of only 0.32mm2. MAED is 4.5x more area efficient than our previously published SANDMAN (the only other jammer-resilient receiver), while achieving a lower error rate by jointly performing channel estimation and data detection.
The LDPC design achieves a throughput of latencies in the range of 14 to 18ns, which is the shortest reported in the literature.
The logo depicts SpongeBob and Patricks's best friend, Wormy.
The chip was manufactured in 22FDX with generous support from GlobalFoundries' University MPW Program.