The IIS Chip Gallery
Sigma (1991)
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by
| Application | Audio |
| Technology | 1200 |
| Manufacturer | VLSI Tech |
| Type | Diploma Thesis |
| Package | DIP24 |
| Dimensions | 5178μm x 4644μm |
| Gates | 6 kGE |
| Voltage | 5 V |
| Power | 410 mW (5V, 40MHz) |
| Clock | 12.288 MHz |
Until now, 16-bit accuracy has been accepted as digital audio standard for professional and consumer applications. If this resolution should be maintained up to the product, it is necessary that studio recordings are made with higher resolution. Some professional recording machines are capable to record 20-bit audio data even if the internal AD converters have only 16bit resolution, while todays 20-bit AD converters are no definitive solution to this problem becasue they are usually bulky and very expensive.
In combination iwth a suitable sigma delta modulator, realizes an AD converter with up to 20b resolution at lower cost than today's solutions. It is a 3 stage multirate decimation filter. The 1-bit data stream produced by a 5th order Sigma Delta modulator is decimated by 128 (16/4/2) to produce 20 bit audio data.
The design is based on standard cells, ROM and RAM macrocells and a pipelined 22x22 bit datapath multiplier. Since a multirate filter is not easy to test, a computer program that performs the same function as the chip has been written to verify the simulation.