The IIS Chip Gallery
Whaid (1998)
by
| Application | Biomedical |
| Technology | 800 |
| Manufacturer | austriamicrosystems |
| Type | Research |
| Package | DIP18 |
| Dimensions | 1065μm x 960μm |
| Voltage | 2 V |
| Power | 1.806 mW, 2V |
The chip reported here implements the superheterodyne receiver of a 200 MHz RF Frontend for biomedical applications. The chip comprises a low noise amplifier, a single balanced mixer, a varactor tuned LC local oscillator with buffer and a 16/17 dual modulus prescaler. It is designed in a 0.8um BiCMO technology with 12GHz bipolar transistors.
The main goals of to be achieved in this project were low power consumption and the use of only few external components. All block of the receiver working at the highest frequency are integrated, meaning that they count for about 80% of the power consumption of the whole RF front end.
The two-stage LNA has a measured gain of 17.8dB at 200MHz consuming 118uA. The converison gm of the mixer is 1.88mS at 224uA supply current.The overall voltage gain and noise figure are 26dB and 5.2dB respectively.The VCO'ss phase noise is -104.7 dBc/Hz at an offset of 24kHz. VCO and buffer together consume 90uA. The ECL prescaler including an ECL to CMOS level converter neeeds another 315uA.
The size of the ASIC is 1065x960um2, and its total current consumptiuon is as low as 903uA at 2V.