In recent years, 2nd generation mobile phone services like GSM have become a great success. However, the demand for wireless data services at high data rates necessitates the introduction of new 3rd generation systems like UMTS (Universal Mobile Telecommunication System). To make multi mode terminals with small form factor possible, there is a general trend to use a direct conversion architecture to realize a higher integration level.
In this project, a single chip direct conversion RF frontend for UMTS is being developed. The direct conversion receiver puts more stress onto the baseband circuits as there is less gain and filtering in front of them than in the heterodyne architecture. Additionally, DC offsets must be compensated to prevent saturation of the output at high gain, and low noise performance has to be achieved in the presence of flicker noise for the desired CMOS implementation.
In the first phase, different filter structures have been studied and a topology consisting of a 6th order leapfrog filter with a first order allpass and an active offset compensation scheme has been chosen and designed. The filter has programmable gain over 65 dB in 1 dB steps and its corner frequency can be tuned to compensate for process variations.