The IIS Chip Gallery
Avalanche (
2012
)
Additional pictures below, click to see larger versions
by
Andreas Buechel
,
Marco Delai
,
Christoph Keller
Main Details
Application
Cryptography
Technology
180
Manufacturer
UMC
Type
Semester Thesis
Package
QFN56
Dimensions
1525μm x 1525μm
Gates
25 kGE
Voltage
1.8 V
Power
1 mW, 1MHz 1.8V
Clock
200 MHz
Description
This ASIC features two small SHA-3 (Keccak) implementations.
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