The IIS Chip Gallery
Spoton (
2012
)
Additional pictures below, click to see larger versions
by
Jean-Claude Karlen
,
Alex Locher
,
Beat Muheim
,
Michael Muehlberghuber
Main Details
Application
Cryptography
Technology
180
Manufacturer
UMC
Type
Semester Thesis
Package
QFN56
Dimensions
1525μm x 1525μm
Gates
30 kGE
Voltage
1.8 V
Power
1 mW, 1MHz 1.8V
Clock
250 MHz
Description
This ASIC implements four different hash functions.
Photon
Spongent
SHA-2
A combined core that can implement both SHA-2 and SHA-3 at the same time.
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