The IIS Chip Gallery
DCC2200_HPD (2021)
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by
| Application | Industrial |
| Technology | 22 |
| Manufacturer | GF |
| Type | Research Project |
| Package | Baredie |
| Dimensions | 1250μm x 1250μm |
| Voltage | 0.8-3.0 V |
| Power | 23uW-300 mW |
| Clock | 2.3 GHz |
The chip is a new fully integrated DC-DC converter featuring on-chip orthogonally placed 8-shaped stacked transformers for miniaturized power delivery. It achieves power conversion efficiency up to 74.5% and peak power density of 3.2W/mm^2 delivering 23uW-0.3W output power. The proposed on-chip transformer design minimizes the magnetic field intensity outside of its borders, mitigating issues such as parasitic coupling, local oscillator pulling and EMI, demonstrating a measured 27dB reduced magnetic interference.
See also the High Efficiency version of this chip DCC2200_HE
This chip was manufactured with generous sponsorship by HiSilicon through the Europractice-IC service.
During initial planning stage, the die area was reserved for a PLL implementation, later in the project, it was decided to make a second version of the DC DC converter. This caused some confusion as the chip is officially listed as PLL2200 in several documents.