The IIS Chip Gallery
Kairos (2022)
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by
| Application | Pulp |
| Technology | 65 |
| Manufacturer | TSMC |
| Type | Research |
| Package | QFN64 |
| Dimensions | 3600μm x 2000μm |
| Gates | 5 MGE |
| Voltage | 1.2 V |
| Power | 78 mW @180 MHz |
| Clock | 180 MHz |
Kairos is a TSMC65 chip implementing a power controller for HPC systems. It is the single core version of the full power controller ControlPULP, based on PULP, that hosts one manager core coupled with a cluster of 8 worker cores.
Kairos hosts the first silicon implementation of the RISC-V CLIC (Core Local Interrupt Controller), whose specification are currently under development by RISC-V and that is designed to provide fast interrupt response, fine-grained level and priority control on each interrupt line, preemption and nested interrupts. It further extend the base CLIC implementation by adding shadow registers that allow to save and restore the stack in hardware, reducing interrupt latency.
Kairos implements 64 mailboxes following the ARM SCMI protocol with doorbell based notification mechanism; they allow reactive message exchange between the host OS on top of the controlled cores and the power controller, where each mailbox can be shared among more controlled cores.
The name of the chip refers to Kairos, one of the names ancient greek used to indicate time. Unlike the more famous Chronos, that refers to chronological or sequential (quantitative) time, Kairos refers to 'deep and qualitative time', or 'time that can be measured in deep exhales' during a single instant, without tracking the mechanical advancement of chronos time.