The IIS Chip Gallery
Saffron (2022)
by
| Application | Biomedical |
| Technology | 65 |
| Manufacturer | TSMC |
| Type | Research |
| Package | Baredie |
| Dimensions | 1000μm x 1000μm |
| Voltage | 1.2 V |
| Power | 5 mW @1.2V 25C |
| Clock | 64 MHz |
This chip is part of the spice chips (MoCoMRI2 aka Salt, MoCoMRI3 aka Pepper) designed to be used in MRI applications.
Saffron is a divider-less digital fractional PLL with constant-ramp phase detector incorporating a class-B CMOS VCO with LC-Tank and a digital spur compensation technique. The DCO has a center frequency of 3.3GHz with a tuning range of 1.3GHz and the 64MHz input clock should in the end come from the Pepper chip. The measured jitter of the locked PLL in the band from 200kHz to 32MHz reached 220fs.