The IIS Chip Gallery
Flamingo (2025)
by
| Application | Pulp |
| Technology | 22 |
| Manufacturer | GF |
| Type | Research |
| Package | BGA472 |
| Dimensions | 4140μm x 3500μm |
| Gates | 1 |
| Voltage | 0.8 V |
| Power | 400 mW |
| Clock | 500 MHz |
Flamingo is the first chip of the PULP family to integrate LPDDR and PCIe IPs from Synopsys. It is designed in GF22 technology and packaged in BGA. Flamingo is a heterogeneous SoC for mixed-criticality applications such as robotics, automotive, and industrial control. It integrates a Linux-capable 64-bit RISC-V host (CVA6) with virtualization support and hardware features for time-predictability. AI-intensive workloads are accelerated by a compute cluster of two multi-precision floating point RISC-V vector engines, achieving 64GFLOPS at FP8.