The IIS Chip Gallery
Ristretto (2026)
by
| Application | Pulp |
| Technology | 130 |
| Manufacturer | IHP |
| Type | Teaching |
| Package | QFN56 |
| Dimensions | 2500μm x 2000μm |
| Voltage | 1.2 V |
| Power | 25 mW @100 MHz |
The IHP130 open-source Ristretto consists of two mixed-signal blocks designed for event-based sensing and computation.
The upper-left region of the die contains a two-channel analog front-end featuring a 31.6 dB gain OTA amplifier with bandwidth of 37.5 kHz. The amplified signal is then compared against programmable high and low thresholds and converted into UP and DOWN events by two silicon Integrate-and-Fire (IF) neurons which outputs spikes off-chip through four-phase handshaking.
The lower-right region of the die contains three Adaptive Exponential Integrate-and-Fire (AdExp-IF) neurons, an 11-bit 100fA-to-1uA bias generator, and an SPI programming interface. Each neuron receives input currents from Voltage-to-Current converters (V2I) and outputs spikes off-chip through four-phase handshaking.
This chip is part of the ODE4EC-AMS efforts using only open source tools for the IC design.