The IIS Chip Gallery
Gemini (1994)
Additional pictures below, click to see larger versions
by
| Application | Graphics |
| Technology | 1200 |
| Manufacturer | VLSI Tech |
| Type | Semester Thesis |
| Package | PGA84 |
| Dimensions | 3800μm x 3800μm |
| Gates | 5 kGE |
| Voltage | 5 V |
| Clock | 200 MHz |
This high-throughput data link ASIC serves to transfer the digital data generated by a megapixel sensor in a pen sized hand piece of an endoscopic camera down to the processing back end.
A serial solution was chosen to minimize the diameter of the cable linking the camera to the back-end. Thsi posed challenges in terms of power consumption and noise due to the high clock rates needed in such an approach. A multi-stage approach with dual-edge triggered memory elements was used for the serializer, so only very few parts actually run with the high clock rates mentioned.
The chip can be configured either as a transmitter or as receiver. Test results show that when configured as transmitter, the data rate is 520 Mbit/s at 260 MHz clock, and as recfeiver, the transfer rate is 420 Mbit/s at 210 MHz clock. The receiver automatically synchronizes with the transmitter using an initialization sequence.
This is one of the logo happy chips in the collection. The text at bottom left part reads:
GREETINGS TO
MCSCHGECHLI, MILLE, OLI,
LALLER DES JAHRES, J-3,14,2,71-DI,
SACHAROSE, UKW, ORLANDO, LITTLE BI,
BRUN, BIO-GUIDO, NETSCHI, LIENI,
FEIGI, KALDECHEN, HUBI, ADI,
ALLE, DIE IHREN NAMEN NOCH
NICHT GEFUNDEN HABEN
BAARER BIER, EICHOF, HUERLIMAN,
BUNDY OP, HUUSKAFI, STROM, JAYDEE,
LANDEI, CHNOBLAUCHPULVER, PIZZA,
BURGER ALLER ART, HOT DOG, FONDUE,
TEIGWAARE UND ES GUEGGELI,
GRUSS VON SCHOCHLI AN TANJA
SPECIAL THANKS TO
TOM AND RETO