|Dimensions||5600μm x 5400μm|
In order to integrate all mechanical, optical and electrical components into the hand-piece of a biomedical instrument (endoscope), a high degree of miniaturization is required. A chip set is being developed by IIS for this purpose. A key component of the camera head is the CCD driver stage. Its task is to convert the CMOS-level signals of the pulse generator ASIC (BONGO) to the different required voltage levels with the high current drive capabilities necessary for driving the huge capacitances of the 1024x1024 pixel CCD sensor control signals.
The ASIC PALANTIR has been designed for this task and integrated in a BiCMOS Process (Alcatel Mietec 2um HBIMOS). The verification tests of the 5.6 x 5.4 mm2 chip were performed in two phases. First a test bed with probe points emulating the operating environment has been realized. The ASIC tester HP83000 has been used as input source. In the second phase a camera head has been equipped with the PALANTIR ASIC. For high signal integrity chip-onboard mounting of the driver stage was chosen. The goal of this test phase is the verification of the requirements posed on the combination driver ASIC and CCD chip.