The IIS Chip Gallery
USB (1998)
by
| Application | Audio |
| Technology | 800 |
| Manufacturer | ES2 |
| Type | Semester Thesis |
| Package | PGA84 |
| Dimensions | 4400μm x 5200μm |
| Voltage | 5 V |
The project had two major goals: Design a full duplex USB audio input/output interface chip for a PC and gain practical experience with the incorporation of virtual components (VC) into ASICs.
The audio format supported is 44.1 kHz 16-bit stereo. The circuit essentially consists of the USB serial interface engine (SIE), an intermediate buffer for audio data, and a controller. All these subfunctions have been integrated on a single chip of 4.4 x 5.2 mm2.
IIS obtained synthesis code for the SIE by becoming member of the USB Implementers Forum. Closer investigation of the VC delivered revealed several deficiencies, however. Major difficulties arose from a subdivision of the SIE into multiple clock domains, the lack of guidance for synthesis (architectural background, timing constraints, synthesis scripts) the absence of any testbenches, and from three bugs. To make things worse, no software drivers were available for simulation and testing purposes, and support was inexistent. Although these problems have eventually been solved, it became clear that more attention must be paid to the comprehensiveness of VC packages. In addition, the availability of the VC as VHDL source code rather than in some intermediate or cryptographically protected format turned out to be instrumental in answering many questions and in locating numerous problems.