The IIS Chip Gallery
Invictus_B1 (2015)
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by
| Application | Communication |
| Technology | 130 |
| Manufacturer | SMIC |
| Type | Research |
| Package | QFN56 |
| Dimensions | 3432.09μm x 3131.97μm |
| Gates | 600 kGE |
| Voltage | 1.2 V |
| Power | 10W (@1MHz, 1.2V) mW |
| Clock | 180 MHz |
This ASIC contains the digital baseband for the 3G standard TD-SCDMA / TD-HSPA, which is emerging from China. It supports the modulation schemes (QPSK, 8PSK, 16QAM, 64QAM) and channel coding schemes of all legacy and enhanced modes of the TD-HSPA+ LCR single-carrier downlink. The ASIC receives I/Q samples and provides the decoded transport block bits.
The chip contains abot 560 kGE of logic in addition to about 640 kBits of SRAM.
This chip is a redesign of an earlier version, hence the name B1.