The IIS Chip Gallery

LUK (2016)

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by

Ramon Aerne, Matthias Korb, Benjamin Weber

Main Details

Application	Communication
Technology	65
Manufacturer	UMC
Type	Semester Thesis
Package	QFN40
Dimensions	1252μm x 1252μm
Gates	1
Voltage	1.2 V
Power	999 mW @ 0.01 V, 0.01 MHz
Clock	200 MHz

Description

This a general LDPC (Low-Density Parity Codes) decoder that offers great flexibility to support:

• Additional algebraic structures in addition to Galois fields
• Different field orders
• Different H Matrices

The name LUK is apparenlty Russian for Onion. This comes from a roommate of Ramon who claimed that his design had many layers like an onion.

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