The IIS Chip Gallery
Phoenix (2016)
Additional pictures below, click to see larger versions
by
| Application | Graphics |
| Technology | 65 |
| Manufacturer | UMC |
| Type | Semester Thesis |
| Package | QFN40 |
| Dimensions | 1252μm x 1252μm |
| Gates | 250 kGE |
| Voltage | 1.2 V |
| Power | 999 mW @ 1.08 V, 200 MHz |
| Clock | 300 MHz |
Finding correspondences between two images by determining, describing and matching points of interest is a crucial task in some computer vision problems. Previously, an efficient algorithm for this purpose has been implemented in hardware at the institute (Sandstorm) . It performs really well in constrained setups, but is not perfect when it comes to more general perspectives or large movements between frames. For this reason, a new descriptor has been developed at the institute recently. In this project, the descriptor's performance was evaluated, a part of the previous algorithm was ported into the new chip and the descriptor was implemented efficiently.
The final chip can process 1080p pictures at 40 frames per second (fps) and deal with 25 to 40 thousand correspondence points per image
Just as the blazing Phoenix, this chip arises from the ashes of its precursor, now more agile and performant than ever. (This is one story, the one I believe is that Yannick and Bastien always wanted to go to Phoenix, Arizona .). The artwork is taken from this website, it is meant as a tattoo.