|Dimensions||2626μm x 2626μm|
|Power||54 mW @ 1.2 V, 200 MHz|
This is the first multi-cluster PULP implementation on ASIC. The design contains 2 clusters with each 4 RI5CY cores and 64 kBytes of TCDM memory as well as 8 kBytes if Instruction cache. The top level contains further 128 kBytes of L2 memory.
The chip supports the load-reserved and store-conditional atomic instructions, and therefore is called Atomario with reference to Mario.