The IIS Chip Gallery
DCDC_HE (2020)
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| Application | Low-power |
| Technology | 180 |
| Manufacturer | TSMC |
| Type | Research |
| Package | baredie |
| Dimensions | 1850μm x 870μm |
| Voltage | 1 - 3 V |
| Power | 70 uW -0.5W |
| Clock | 1.25 GHz |
The chip is a new fully integrated, resonant DC-DC converter topology with 1.25GHz switching frequency for achieving a high power density (0.3W/mm2). The proposed electromagnetic coupling method provides less than 1% output voltage ripple without any output capacitance and eliminates auxiliary circuits such as frequency reference, phase generator, clock buffer, and level shifters. This work also proposes a duty cycle modulation scheme to provide a wide output power range from 70uW to 0.5W while maintaining its peak afficiency.
See also for a High Power Density version of this chip.