The IIS Chip Gallery

DCDC_HPD (2020)

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by

Alessandro Novello, Gabriele Atzeni, Giorgio Cristiano, Mathieu Coustans, Taekwang Jang

Main Details

Application	Low-power
Technology	180
Manufacturer	TSMC
Type	Research
Package	baredie
Dimensions	700μm x 480μm
Voltage	1-3 V
Power	70 uW -0.5W
Clock	2.5 GHz

Description

The chip is a new fully integrated, resonant DC-DC converter topology with 2.5GHz switching frequency for achieving a high power density (1W/mm2). The proposed electromagnetic coupling method provides less than 1% output voltage ripple without any output capacitance and eliminates auxiliary circuits such as frequency reference, phase generator, clock buffer, and level shifters. This work also proposes a duty cycle modulation scheme to provide a wide output power range from 70uW to 0.5W while maintaining its peak afficiency.

See also for a High Efficiency version of this chip.

Related Publication

• Alessandro Novello, Gabriele Atzeni, Giorgio Cristiano, Mathieu Coustans, Taekwang Jang, "A 1.25GHz Fully Integrated DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators", In Proc. 2021 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2021, pp. 260-262, DOI: 10.1109/ISSCC42613.2021.9366037