The IIS Chip Gallery
Iguana (2023)
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by
| Application | Pulp |
| Technology | 130 |
| Manufacturer | IHP |
| Type | Research |
| Package | QFN88 |
| Dimensions | 6264μm x 6264μm |
| Gates | 3 MGE |
| Voltage | 1.2 V |
| Clock | 60 MHz |
Iguana is our first attempt at using the IHP 130nm Open PDK. The design is essentially the same as Cheshire platform using the CVA6 64-bit RISC-V processor originally developed as part of the PULP team.
The design was completed using only open source standard cell libraries, and although an almost complete backend run was made with the OpenROAD tools, a last minute issue very close to the tape-out date resulted in a backup design using commercial EDA tools to be taped-out. Read about our experience in presentation at the FSiC2023(slides).
This design has received generous support from Leibniz Institute for High Performance Microelectronics.
For this series of designs using open source EDA tools we have chosen the name of lizards.