The IIS Chip Gallery
Signature_Analyzer (1987)
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| Application | Test |
| Technology | 3000 |
| Manufacturer | Faselec |
| Type | Semester Thesis |
| Package | DIP40 |
| Dimensions | 3200μm x 2400μm |
| Gates | 600 |
| Voltage | 5 V |
| Clock | 10 MHz |
This chip realizes a linear feedback shift register (LFSR) that can be used to test chips. The LFSR is 16 bits wide and a control logic allows the current state to be displayed on a LED display.