The IIS Chip Gallery

Bus_Brother (1994)

by

Daniel Ruethemann, Stefan Walter, Robert Rogenmoser

Main Details

Application	Industrial
Technology	1200
Manufacturer	VLSI Tech
Type	Semester Thesis
Package	DIP40
Dimensions	2960μm x 2940μm
Gates	6 kGE
Voltage	5 V
Clock	40 MHz

Description

This chip is designed to monitor the microprocessor periphery bus. The chip has beend esigned to detect certain bit patterns that appear on the bus. Up to 3 consecutive patterns identified through a mask (that selects which bits to check) and the pattern itself can be detected. Once a valid pattern is detected an interrupt signal is generated, and once of the following operations can be executed:

• The data is stored in an external memory for all the detected sequences. This could for example be used to store the data sent to a certain address.
• Data is stored until a sequence is detected. This allows recording of a transmission until a certain sequence
• Data storage is started after a sequence has been started.
• Only interrupts are generated, no data storage is performed.

A simple serial interface is used to program the chip. A single busbrother can monitor 16 bits. For a 32-bit system four chips have to be used in parallel (2 for the data bus and 2 for the address bus)

Although there is no logo on the chip, the cover page on the semester thesis shows Jake and Elwood from the movie Blues Brothers.

Related Publication

No related publications yet