The IIS Chip Gallery
2D_DCT (2001)
Additional pictures below, click to see larger versions
by
| Application | Test |
| Technology | 600 |
| Manufacturer | austriamicrosystems |
| Type | Research |
| Package | LCC68 |
| Dimensions | 3520μm x 3520μm |
| Gates | 30 kGE |
| Voltage | 3.3 V |
| Clock | 100 MHz |
This is a test chip that utilizes two full-custom latch-based memories that allow the contents to be written and read out in different orders. The first memory is the so called T-memory, where writing is done in rows and read-out is in columns, where as the second memory Z-memory is written in rows and read out in a diagonal pattern.
The chip is also known as the birthday chip, as it was taped-out on the 30th birthday of Frank, there is a small logo on the chip for that.
In addition the chip contains three ring oscillators that differ in the way the Metal-diffusion contacts of their were laid out. The idea is to test how the contact distirbution affects the W/L ratio of a transistor.