The IIS Chip Gallery
Pi (2003)
by
| Application | Fun |
| Technology | 250 |
| Manufacturer | UMC |
| Type | Semester Thesis |
| Package | LCC84 |
| Dimensions | 2500μm x 2500μm |
| Gates | 100 kGE |
| Voltage | 2.5 V |
| Clock | 292 MHz |
π has a long history spanning from the Babylonians (about 2000BC) until today. Until recently it was believed to be impossible to calculate a new digit of π without knowledge of all preceding digits. This changed in 1996 when D.Bailey, P.Borwein and S.Plouffe published a new class of algorithms that make it possible to focus all computational power on the calculation of a single digit of pi. Besides pi, it is also possible to calculate π^2, ln(3) and ln(5).
The most complex function of the algorithm implemented. by the students is the computation of a modular exponentiation. Since there is no data dependency between the individual function calls, the algorithm can be parallelized. Therefore, three instances of this functional block have been implemented.The results of these functions are processed further in a separate block. The design includes a serial interface that is compatible to the well-known RS- 232 protocol. An adjustable and stoppable on-chip oscillator is integrated. The generated frequency can be controlled over the RS-232 interface. This allows to run each chip at its maximum clock speed.
The ASIC has been implemented on a CMOS 0.25um five metal-layer process from UMC. The maximum operating frequency of the tested chips at 2.5V core voltage and 3.3V pad supply is 292MHz.