The IIS Chip Gallery
SRC (2004)
by
| Application | Audio |
| Technology | 250 |
| Manufacturer | UMC |
| Type | Semester Thesis |
| Package | LCC84 |
| Dimensions | 2500μm x 2500μm |
| Gates | 120 kGE |
| Voltage | 2.5 V |
| Clock | 33 MHz |
This chip is an asynchronous sample rate converter targeting professional audio applications. Input and out sampling frequencies in the range of 1 to 192kHz are supported with a resolution of up to 24 bits. The audio inputs and outputs are provided using I2S ports.
After a conventional four-fold up-sampling of the input data, B-Spline interpolation of order 8 is used to calculate the new samples at double output sample rate, which is finally decimated to the requested format.