The IIS Chip Gallery
SYN1 (2004)
by
| Application | Communication |
| Technology | 130 |
| Manufacturer | STM |
| Type | Research |
| Package | LCC44 |
| Voltage | 1.2 V |
Third-generation cellular radio networks based on Wide-band Code Division Multiple Access (WCDMA) are growing rapidly and believed to dominate the market in the next few years. Given the substantial amount of digital signal processing, fine line CMOS technologies with gate lengths of 0.13 um or even below is preferred to realize low power, cost effective solutions. A RF front-end in the same technology simplifies the technology mix for the wireless chip set and offers a potential for higher integration level. Recently much research has been carried out on the low voltage and low power CMOS design of WCDMA transmission. However, the progress of the corresponding frequency synthesizers is slow. This is probably due to the difficulties in achieving good phase noise voltage-controlled oscillator (VCO) and high speed prescaler with limited supply voltage which is the key aspect to meet the stringent WCDMA specifications.
In this project, an integer-N frequency synthesizer, including an on-chip VCO, has been successfully implemented in 0.13 um standard CMOS technology. The overall performance meets the UMTS specifications with low power consumption which is a result of careful design and layout of the individual building blocks. A compact layout has been obtained, which forsters the inclusion of synthesizers for single chip UMTS transceiver to maximize the level of integration and also contradict the argument that synthesizers take up too much space in a complete solution, hence making it too costly.