The IIS Chip Gallery
Espelette (2023)
Additional pictures below, click to see larger versions
by
| Application | Low-power |
| Technology | 65 |
| Manufacturer | TSMC |
| Type | Research |
| Package | Baredie |
| Dimensions | 1500μm x 1000μm |
| Voltage | 3.7 V |
| Power | 10 mW |
| Clock | 64 MHz |
This chip is part of the spice chips (MoCoMRI2 aka Salt, MoCoMRI3 aka Pepper, Saffron) designed to be used in MRI applications. The name comes from the Espelette pepper (piment d'Espelette in French) and is the updated version of the Pepper chip.
The Bang-Bang PLL with a Digitally Controlled Crystal Oscillator is now powered through Low-DropOut regulators (LDOs) out of a voltage around 3.7V, nominal voltage of a lithium-ion cell. The free-running oscillator has shown 350fs of measured RMS jitter between 10Hz and 32MHz.
It also includes a modified version of the Broadcast Receiver allowing to decode messages sent through AM modulations. The measured sensitivity of the message detector reached -67dBm and the one of the system -66dBm to keep the PLL locked. When modulations are added to the input clock, the measured sensitivity reduced to -57dBm.