The IIS Chip Gallery
Darwin (1993)
by
| Application | Fun |
| Technology | 1200 |
| Manufacturer | VLSI Tech |
| Type | Semester Thesis |
| Package | DIP48 |
| Dimensions | 4189μm x 4190μm |
| Gates | 6 kGE |
| Voltage | 5 V |
| Clock | 20 MHz |
This chip implements a simple genetic algorithm. It accepts strings encooded with 16 bits and performs selection, crossover and mutation on these. The chip is cascadable to allow for a higher length of bit strings. The population size is however limited to 4094 and this information is stored in an external dual-port SRAM. The chip uses an LFSR as a pseudo random number generator needed to run the genetic algorithms.