Reto Zimmermann
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Designer for following chips
Publications related to the chips in the gallery
- Reto Zimmermann, Andreas Curiger, Heinz Bonnenberg, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, "A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm", IEEE Journal of Solid-State Circuits, Mar 1994, Vol: 29, Issue:3, page(s): 303 - 307, DOI: 10.1109/4.278352