The IIS Chip Gallery
Doelf (1993)
by
| Application | Filter |
| Technology | 1200 |
| Manufacturer | VLSI Tech |
| Type | Semester Thesis |
| Package | PGA84 |
| Dimensions | 3200μm x 6500μm |
| Gates | 14 kGE |
| Voltage | 5 V |
| Clock | 10 MHz |
A low frequency filter obviously needs an impulse response of long duration. This can be achieved by a Finite Impulse Response (FIR) filter with a large number of coefficients. However, Infinite Impulse Response (IIR) filters can generate long impulse responses with few coefficients due to their recursive structure.
The necessary condition for phase linearity is symmetry of the impulse response which also implies finite duration. In this student project an ASIC has been designed which realizes (almost) linear phase with an IIR filter that runs once in normal manner and one in reverse time. The combination of the two filters leads to a quasi symmetrical impulse response the necessary asymmetrical truncation of which occurs below the noise level.
The realized filter is of order eight. The specific realization needs 24 multiplications per sample for an impulse response duration of 4096 samples. A lot of computation could therefore be saved compared to a FIR implementation, however at the cost of 64kBytes (external) storage per channel.