The IIS Chip Gallery
3D_DCT (1998)
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The 2D/3D (I)DCT ASIC is designed for applications in real-time video-compression using the XYZ-Pack or Motion JPEG algorithm. It\u2019s main function is to perform fast 2D and 3D discrete cosine transforms (DCT) and the inverse (IDCT) on video cubes of 8 by 8 by 8 pixels.
In the DCT mode the original cubes with a word width of 8 bits are transformed to frequency domain and stored 12-bit wide. In the IDCT mode the video cubes in frequency domain (12 bits) are transformed back and the original frame sequence is restored. The ASIC supports image sizes between 8 by 8 and 1024 by 1024 pixels in steps of 8 pixels.
The data throughput at 50 MHz operating frequency is 17,000 video cubes/s in 2D or 10,000 video cubes/s in 3D which is sufficient for a video sequence of 450 by 450 8 bit pixels @ 24 frames/s. For higher resolutions and frame rates a special interface allows up to 3 ASICs to work in parallel on the same data busses.