The IIS Chip Gallery

Solaris (2004)

by

Rolf Anderegg, Ulrich Franke, Peter Luethi, Norbert Felber

Main Details

Application	Audio
Technology	250
Manufacturer	UMC
Type	Diploma Thesis
Package	LCC84
Dimensions	2500μm x 2500μm
Gates	80 kGE
Voltage	2.5 V

Description

To generate hall effects, room modelling or architectural acoustics, convolutions with very long impulse responses are required. This chip combines latency reducing FFT based methods with I/O delay reducing time-domain models

Related Publication

• Rolf Anderegg, Ulrich Franke, Norbert Felber, Wolfgang Fichtner, "Implementation of High Order Convolution Algorithms with Low Latency on Silicon Chips", In. Proc. of the AES 117th convention San Francisco, NO 6304, Oct 2004