The IIS Chip Gallery
Raccoon (2020)
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| Application | Machine-learning |
| Technology | 65 |
| Manufacturer | TSMC |
| Type | Research |
| Package | QFN56 |
| Dimensions | 2000μm x 2000μm |
| Gates | 1400 kGE |
| Voltage | 1.2 V |
| Power | 245 mw @1.2V 25C |
| Clock | 200 MHz |
Residual network ACcelerator leveraging extended bit-plane COmpressiON (Raccoon) is a ternary weight CNN accelerator with integrated compression for both the ternary weights and the feature maps. For compressionddd EBPC (extended bit plane compression) that forces a minimum spatial resolution to be compressed which deviates from the more traditional convolutional acceleration which typically output a single pixel at once.
RACCOON has taken the ResNet architecture as reference and features 3x3 convolution, 1x1 convolution, stride two, residual skip-connections, batch normalization and Rectified Linear Unit (ReLU) activation. Raccoon achieves an I/O compression ratio of 1.45 for ResNet-34 feature maps and a core energy efficiency of 2.54 TOp/s/W at 1.2 V and an estimated device energy efficiency of 1.24 TOp/s/W.
An I/O compression ratio of 1.45 for ResNet-34 feature maps has been achieved. Core energy effiency has been determined to be 2.54 TOp/s/W at 1.2 V & 25C and device energy efficiency is at an estimated 1.24 TOp/s/W.