The IIS Chip Gallery
SRAMstein (2020)
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by
| Application | Machine-learning |
| Technology | 65 |
| Manufacturer | TSMC |
| Type | Research |
| Package | DIP48 |
| Dimensions | 2000μm x 2000μm |
| Gates | 1400 kGE |
| Voltage | 1.2 V |
| Power | 67 mW @1.2V 25C |
| Clock | 1-2 GHz |
SRAMstein is a test vehicle for new in-memory computing techniques. It consists of an array of 8bit SRAM words arranged in a 64 x 256 crossbar with additional In-Memory Compute Units (IMCUs) for performing analog multiply-accumulate (MAC) operations. Digitization of the result vector is achieved in 16, on-chip, 8bit SAR ADCs.
The chip name, written in Latin and Arabic letters, is inspired by the German band Rammstein implying that the SRAM-based in-memory computing technology will rock.