The IIS Chip Gallery
Transparent_IDE (2003)
by
| Application | Cryptography |
| Technology | 250 |
| Manufacturer | UMC |
| Type | Semester Thesis |
| Package | LCC84 |
| Dimensions | 2500μm x 2500μm |
| Gates | 40 kGE |
| Voltage | 2.5 V |
| Clock | 100 MHz |
This chip is designed to be placed between a standard IDE controller and a IDE/ATA compatible hard disk. It is able to detect data transfers on the IDE interface and will encrypt data being written to the hard disk. During write operations data is encrypted. The operation is totally transparent to higher levels of the system.
The encryption is provided by the AES core developed during the design of Fastcore and uses the cipher feedback mode for en/decryption.