The IIS Chip Gallery
Blaues_Wunder (2010)
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| Application | Test |
| Technology | 180 |
| Manufacturer | UMC |
| Type | Semester Thesis |
| Package | QFN56 |
| Dimensions | 1525μm x 1525μm |
| Gates | 2500 |
| Voltage | 1.8 V |
| Clock | 100 MHz |
This is a test chip that contains a dynamic memory arrayThe name of the chip comes from a famous bridge in Dresden, hometown of the main designer Markus. It follows a tradition where the chips manufactured as part of projects by Pascal are given bridge names. See also Unidad, and Bogazici.
The memory array is the small rectangle in the middle. There
Also included in the chip are two ring oscillators, cleverly concealed in the pad ring. These were added by Beat, to monitor process variations.