The IIS Chip Gallery

Pascal Meinerzhagen

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Information

Pascal Meinerzhagen was born in Bern, Switzerland, in 1984. He received his B.Sc. and M.Sc. degrees in Electrical and Electronics Engineering from the Swiss Federal Institute of Technology in Lausanne (EPFL) in 2006 and 2008, respectively. In 2008, he also received a joint certificate in Micro- and Nanotechnologies for Integrated Systems from the Swiss Federal Institute of Technology in Lausanne (EPFL), Switzerland, the Grenoble Institute of Technology (INPG), France, and the Politecnico di Torino, Italy.

During his Master's Thesis, he was a visiting researcher in Chancellor Steve Kang's group at the University of California, Merced, USA, where he designed a 12-bit low-power SAR A/D Converter for a Neurochip.

Currently, he is pursuing his PhD degree in the Integrated Systems Laboratory (IIS) at the Swiss Federal Institute of Technology in Zurich (ETHZ), Switzerland, focusing on logic-compatible high-density memory structures for fault-tolerant systems in deep-submicron CMOS technologies and memory arrays assembled from standard cells for configurable low-power VLSI systems.

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Created by make_cg.pl on 2017-05-15.16:15:52