Juerg Treichler
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Designer for following chips
Publications related to the chips in the gallery
- Adrian Lutz, Juerg Treichler, Frank K. Gurkaynak, Hubert Kaeslin, Gerard Basler, Andres Erni, Stephan Reichmuth, Pieter Rommens, Stephan Oetiker, Wolfgang Fichtner, "2 Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A comparative analysis", Lecture Notes in Computer Science vol 2533, CHES 2002, DOI: 10.1007/3-540-36400-5_12
- Juerg Treichler, Qiuting Huang, Thomas Burger, "A 10-bit ENOB 50-MS/s Pipeline ADC in 130-nm CMOS at 1.2 V Supply", Proceedings of the 32nd European Solid-State Circuits Conference, ESSCIRC 2006., DOI: 10.1109/ESSCIR.2006.307512
- Juerg Treichler, Qiuting Huang, "A 11.1-bit ENOB 50-MS/s Pipelined A/D Converter in 130-nm CMOS without S/H Front End", Proceedings of the 36th European Solid-State Circuits Conference, ESSCIRC 2010.