Wolfgang Fichtner

Publications related to the chips in the gallery

• Reto Zimmermann, Andreas Curiger, Heinz Bonnenberg, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, "A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm", IEEE Journal of Solid-State Circuits, Mar 1994, Vol: 29, Issue:3, page(s): 303 - 307, DOI: 10.1109/4.278352
  
  
• Manfred Stadler, Thomas Roewer, Markus Thalmann, Norbert Felber, Wolfgang Fichtner, "An embedded stack microprocessor for SDH telecommunication applications", Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998, page(s): 17 - 20, DOI: 10.1109/CICC.1998.694899
  
  
• Markus Thalmann, Manfred Stadler, Thomas Roewer, Norbert Felber, Wolfgang Fichtner, "A single-chip solution for an ADM-1/TMX-1 SDH telecommunication node element", Twelfth Annual IEEE International ASIC/SOC Conference, Sep. 1999, page(s): 147 - 151., DOI: 10.1109/ASIC.1999.806493
  
  
• Jens Muttersbach, Thomas Villiger, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, "Globally-asynchronous locally-synchronous architectures to simplify the design of on-chip systems", IN proc. Twelfth Annual IEEE International ASIC/SOC Conference, Sep 1999, page: 317-321, DOI: 10.1109/ASIC.1999.806526
  
  
• Daniel Doswald, Juerg Haefliger, Patrick Blessing, Norbert Felber, Peter Niederer, Wolfgang Fichtner, "A 30-frames/s megapixel real-time CMOS image processor", IEEE Journal of Solid-State Circuits, Nov 2000, Vol: 35 , Issue:11, page(s): 1732 - 1743, DOI: 10.1109/4.881221
  
  
• Thomas Roewer, Manfred Stadler, Markus Thalmann, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "Intellectual property module of a highly parametrizable embedded stack processor", In Proceedings, Twelfth Annual IEEE International ASIC/SOC Conference, 1999, page(s): 399 - 403, DOI: 10.1109/ASIC.1999.806542
  
  
• Boris Glass, Bruno Haller, Norbert Felber, Wolfgang Fichtner, "High-Performance QR-RLS Filtering ASIC for Wireless LAN Diversity Combining", Proceedings of the IASTED International Conference Wireless and Optical Communications Banff, Alberta Canada, pp 192-196, June 2001.
  
  
• Jens Muttersbach, Thomas Villiger, Wolfgang Fichtner, "Practical design of globally-asynchronous locally-synchronous systems", Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems, ASYNC 2000, page(s): 52 - 59, DOI: 10.1109/ASYNC.2000.836791
  
  
• Peter Luethi, Thomas Roewer, Manfred Stadler, Daniel Forrer, Stefan Moscibroda, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "A parametrizable hybrid stack-register processor as soft intellectual property module", 13th Annual IEEE International ASIC/SOC Conference, 2000, page(s): 87 - 91, DOI: 10.1109/ASIC.2000.880681
  
  
• Jan Thalheim, Norbert Felber, Wolfgang Fichtner, "A new approach for controlling series-connected IGBT modules", The 2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001., DOI: 10.1109/ISCAS.2001.921248
  
  
• Guiseppe Acunto, Miquel Sans, Andreas Burg, Wolfgang Fichtner, "An ASIC implementation of the Adaptive Arithmetic Coding", 26th Asilomar Conference on Signals, Systems and Computers, USA
  
  
• Eric Roth, Markus Thalmann, Norbert Felber, Wolfgang Fichtner, "A delay-line based DCO for multimedia applications using digital standard cells only", Digest of Technical Papers IEEE International Solid-State Circuits Conference, ISSCC 2003, page(s): 432 - 505 vol.1, DOI: 10.1109/ISSCC.2003.1234371
  
  
• Adrian Lutz, Juerg Treichler, Frank K. Gurkaynak, Hubert Kaeslin, Gerard Basler, Andres Erni, Stephan Reichmuth, Pieter Rommens, Stephan Oetiker, Wolfgang Fichtner, "2 Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A comparative analysis", Lecture Notes in Computer Science vol 2533, CHES 2002, DOI: 10.1007/3-540-36400-5_12
  
  
• Frank K. Gurkaynak, Andreas Burg, Dominique Gasser, Franco Hug, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "A 2Gb/s Balanced AES Crypto-Chip Implementation", 14th ACM Great Lakes VLSI Symposium, GLSVLSI 2004, DOI: 10.1145/988952.988963
  
  
• Thomas Boesch, Eric Roth, Markus Thalmann, Norbert Felber, Wolfgang Fichtner, "A SOC for Multimedia Network Devices", IEEE International Conference on Consumer Electronics, 2003, DOI: 10.1109/ICCE.2003.1218943
  
  
• Stephan Oetiker, Thomas Villiger, Frank K. Gurkaynak, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, "High resolution Clock Generators for Globally-Asynchronous Locally Synchronous Designs", In handouts of Second Asynchronous Circuit Design Workshop (ACiD 2002), Munich
  
  
• Thomas Villiger, Hubert Kaeslin, Frank K. Gurkaynak, Stephan Oetiker, Wolfgang Fichtner, "Self-Timed Ring for Globally-Asynchronous Locally Synchronous Systems", In proc. of 9th International Symposium on Asynchronous Circuits and Systems, ASYNC 2003, Vancouver, DOI: 10.1109/ASYNC.2003.1199174
  
  
• Michael Kuhn, Stephan Moser, Oliver Isler, Frank K. Gurkaynak, Andreas Burg, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "Efficient ASIC implementation of a real-time depth mapping stereo vision system", IEEE Midwestern Symposium on Circuits and Systems MWSCAS 2003
  
  
• David Perels, Reinhard Bischoff, Jonas Biveroni, Markus Bruehwiler, Andreas Burg, Norbert Felber, Wolfgang Fichtner, "Programmable Code Generator for Software Defined Radio", In Proc. of 35th Asilomar Conference on signals, Systems and Computers, 2003., DOI: 10.1109/ACSSC.2003.1292362
  
  
• Flavio Carbognani, Felix Buergin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "Two-Phase Resonant Clocking for Ultra-Low-Power Hearing Aid Applications", In Proc. Design, Automation and Test in Europe, 2006. DATE '06., DOI: 10.1109/DATE.2006.243985
  
  
• Norbert Pramstaller, Frank K. Gurkaynak, Simon Haene, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, "Towards an AES crypto-chip resistant to differential power analysis", Proceeding of the 30th European Solid-State Circuits Conference, 2004. ESSCIRC 2004. Page(s): 307 - 310, DOI: 10.1109/ESSCIR.2004.1356679
  
  
• Rolf Anderegg, Ulrich Franke, Norbert Felber, Wolfgang Fichtner, "Implementation of High Order Convolution Algorithms with Low Latency on Silicon Chips", In. Proc. of the AES 117th convention San Francisco, NO 6304, Oct 2004
  
  
• Andreas Burg, Moritz Borgmann, Markus Wenk, Martin Zellweger, Wolfgang Fichtner, Helmut Boelcskei, "VLSI implementation of MIMO detection using the sphere decoding algorithm", IEEE Journal of Solid-State Circuits, Volume: 40 , Issue: 7, Year: 2005 , Page(s): 1566 - 1577, DOI: 10.1109/JSSC.2005.847505
  
  
• Flavio Carbognani, Felix Buergin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications", In. Proc. International Workshop on Power and Timing Modelling, Optimization and Simulation PATMOS 2005, DOI: 10.1007/11556930_46
  
  
• Frank K. Gurkaynak, Stephan Oetiker, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "Improving DPA security by using globally-asynchronous locally-synchronous systems", Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Page(s): 407 - 410, DOI: 10.1109/ESSCIR.2005.1541646
  
  
• Flavio Carbognani, Felix Buergin, Luca Henzen, Herbert Koch, Hovig Magdassian, Christoph Pedretti, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, "A 0.67-mm2 45uW DSP VLSI implementation of an adaptive directional microphone for hearing aids", Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005., DOI: 10.1109/ECCTD.2005.1523080
  
  
• David Perels, Simon Haene, Peter Luethi, Andreas Burg, Wolfgang Fichtner, Helmut Boelcskei, "ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANs", Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Page(s): 215 - 218, DOI: 10.1109/ESSCIR.2005.1541598
  
  
• Simon Haene, Andreas Burg, Norbert Felber, Wolfgang Fichtner, "OFDM channel estimation algorithm and ASIC implementation", 4th European Conference on Circuits and Systems for Communications, ECCSC 2008, Page(s): 270 - 275, DOI: 10.1109/ECCSC.2008.4611691
  
  
• Flavio Carbognani, Felix Buergin, Daniel Kraehenbuehl, Frank Zuercher, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "Low-power constant-coefficient FIR filtering in a hearing aid application", 8th International Conference on Solid-State and Integrated Circuit Technology, ICSICT '06, Page(s): 1637 - 1639, DOI: 10.1109/ICSICT.2006.306357
  
  
• Felix Buergin, Flavio Carbognani, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, "29% Power Saving through Semi-Custom Standard Cell Re-Design in a Front-End for Hearing Aids", 49th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS '06, Page(s): 610 - 614, DOI: 10.1109/MWSCAS.2006.382137
  
  
• Marc Wegmueller, David Perels, Tobias Blaser, Stephan Senn, Philipp Stadelmann, Norbert Felber, Wolfgang Fichtner, "Silicon Implementation of the SPIHT Algorithm for Compression of ECG Records", 49th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS '06, Page(s): 381 - 385, DOI: 10.1109/MWSCAS.2006.382292
  
  
• Flavio Carbognani, Felix Buergin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, July 2008, Vol: 16 , Issue:7, page(s): 830 - 836, DOI: 10.1109/TVLSI.2008.2000457
  
  
• Flavio Carbognani, Simon Haene, Manuel Arrigo, Claudio Pagnamenta, Felix Buergin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner, "A 0.25um 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication", IEEE Custom Integrated Circuits Conference, CICC '07, Page(s): 451 - 454, DOI: 10.1109/CICC.2007.4405771
  
  
• Frank K. Gurkaynak, Peter Luethi, Nico Bernold, Rene Blattmann, Victoria Goode, Marcel Marghitola, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, "Hardware Evaluation of eSTREAM Candidates: Achterbahn, Grain, Mickey, Mosquito, Sfinks, Trivium, Vest, ZK-Crypt", Proc. Of the SASC 2006 Workshop - Stream Ciphers Revisited, Leuven Belgium
  
  
• Christian Senning, Christoph Studer, Peter Luethi, Wolfgang Fichtner, "Hardware-efficient steering matrix computation architecture for MIMO communication systems", IEEE International Symposium on Circuits and Systems, ISCAS 2008, page(s): 304 - 307, DOI: 10.1109/ISCAS.2008.4541415
  
  
• Peter Luethi, Andreas Burg, Simon Haene, David Perels, Norbert Felber, Wolfgang Fichtner, "VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition", IEEE International Symposium on Circuits and Systems, ISCAS 2007, Page(s): 1421 - 1424, DOI: 10.1109/ISCAS.2007.378495
  
  
• Stefan Eberli, Andreas Burg, Wolfgang Fichtner, "Implementation of a 2 × 2 MIMO-OFDM receiver on an application specific processor", Microelectronics Journal, Vol: 40, Issue 11, Nov. 2009, Pages: 1642-1649, DOI: 10.1016/j.mejo.2009.02.005
  
  
• Stefan Eberli, Davide Cescato, Wolfgang Fichtner, "Divide-and-Conquer Matrix Inversion for Linear MMSE Detection in SDR MIMO Receivers", NORCHIP 2008, Pages 162 -167, DOI: 10.1109/NORCHP.2008.4738303
  
  
• Peter Luethi, Christoph Studer, Sebastian Duetsch, Eugen Zgraggen, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, "Gram-Schmidt-based QR decomposition for MIMO detection: VLSI implementation and comparison", IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Page(s): 830 - 833, DOI: 10.1109/APCCAS.2008.4746151