The IIS Chip Gallery

Darkside (2021)

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by

Angelo Garofalo, Matteo Perotti, Luca Valente, Alessandro Nadalini, Yvan Tortorella, Riccardo Gandolfi, Pietro Maltoni, Marco Antonio Rios, Andrew Simon, Carla Ohanesian, Alexandre Levisse, Francesco Conti, Davide Rossi

Main Details

Application	Pulp
Technology	65
Manufacturer	TSMC
Type	Research
Package	QFN64
Dimensions	4000μm x 3000μm
Gates	8 MGE
Voltage	1.2 V
Power	150 mW @290 MHz
Clock	290 MHz

Description

Darkside is our latest OpenPULP based chip and follows in the footsteps of Dustin.

Darkside comes with eight different RI5CV cores and four new IPs to speed up the computation on Deep Neural Networks.

• Tensor Unit: a parametric module composed of an FMA-based systolic array, to speed up FP16 matrix multiplications for inference and training.
• CHW/HWC format-converter Datamover: dedicated accelerator to convert from the CHW (Channels-Height-Width) matrix storage format to the HWC (Height-Width-Channels) one.
• Depthwise accelerator: dedicated unit to optimize the convolution of 3x3 kernel, leveraging enhanced data reuse for a lower impact on the memory BW.
• RI5CV-NN: a RI5CV processor extended with new instructions to enhance the CPI of sequences of MAC operations. For example, the new MACLOAD instruction can hide the memory accesses used to fetch the operands for the next MAC operation.

Darkside will also integrate a 32kB macro-memory contribution from EPFL, able to perform both conventional and in-memory computing operations. In-memory computing operations are performed by accessing two memory wordlines simultaneously inside one memory subarray. Inside each of the 16 subarrays, a modified memory periphery enables in-situ additions that can be chained to perform multiply-accumulate operations. With this feature, the proposed memory can achieve up to 64 1-byte (or 16 4-bytes) multiplications in parallel. Such operations are the core of AI workloads. The memory is written and read like a conventional memory and is controlled by a specific memory controller that interfaces with a RISC-V processor. The co-integration with a conventional processor able to run arbitrary code opens the way for the evaluation of in-SRAM computing accelerators in a realistic AI applications environment.

The name and the logo of the chip are inspired by Pink Floyd album Darkside of the moon. Davide Rossi is a great fan. At the same time, the term Darkside of the force was too god to pass up, that is why we have Darth vader superimposed on the prism. Lastly, we acknowledge the contribution of the ESL as we have several BLADE memory block integrated as well.

Related Publication

• Angelo Garofalo, Yvan Tortorella, Matteo Perotti, Luca Valente, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti, "DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training", IEEE Open Journal of the Solid-State Circuits Society, vol. 2, pp. 231-243, 2022, DOI: 10.1109/OJSSCS.2022.3210082