Davide Rossi
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Designer for following chips
Publications related to the chips in the gallery
- Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank K. Gurkaynak, Andrea Bartolini, Philippe Flatresse, Luca Benini, "A 60 GOPS/W, -1.8 V to 0.9 V body bias ULP cluster in 28 nm UTBB FD-SOI technology", Journal of Solid-State Electronics, Volume 117, March 2016, Pages 170-184, DOI: 10.1016/j.sse.2015.11.015
- Marco Crescentini, Marco Biondi, Marco Bennati, Paolo Alberti, Giulia Luciani, Cinzia Tamburini, Matteo Pizotti, Aldo Romani, Marco Tartagni, David Bellasi, Davide Rossi, Luca Benini, Marco Marchesi, Domenicos Cristaudo, "A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 um BCD", Proceedings of the 42nd Eurpoean Solid-State Circuits Conference (ESSCIRC-2016), pp 393-396, DOI: 10.1109/ESSCIRC.2016.7598324
- Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank K. Gurkaynak, Adam Teman, Jeremy Constantin, Andreas Burg, Ivan Miro-Panades, Edith Beigne, Fabien Clermidy, Philippe Flatresse, Luca Benini, "Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster", IEEE Micro, vol. 37, no. 5, pp. 20-31, DOI: 10.1109/MM.2017.3711645
- Francesco Conti, Robert Schilling, Davide Schiavone, Antonio Pullini, Davide Rossi, Frank K. Gurkaynak, Michael Muehlberghuber, Michael Gautschi, Igor Loi, Germain Haougou, Stefan Mangard, Luca Benini, "An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol: 64, Issue: 9, Sept. 2017, pp 2481 - 2494, DOI: 10.1109/TCSI.2017.2698019
- Antonio Pullini, Francesco Conti, Davide Rossi, Igor Loi, Michael Gautschi, Luca Benini, "A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision", IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: PP, Issue: 99 ), 2017, DOI: 10.1109/TCSII.2017.2652982
- Davide Rossi, Antonio Pullini, Christoph Mueller, Igor Loi, Francesco Conti, Andreas Burg, Luca Benini, Philippe Flatresse, "A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors", IEEE Design & Test, vol. 34, no. 6, pp. 46-53, Dec. 2017, DOI: 10.1109/MDAT.2017.2750907
- Eric Flamand, Davide Rossi, Francesco Conti, Igor Loi, Antonio Pullini, Florent Rotenberg, Luca Benini, "GAP-8: A RISC-V SoC for AI at the Edge of the IoT", In Proc. IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, 2018, pp. 1-4,European Solid State Circuits Conference (ESSCIRC) 2018, 3-6 Sep 2018, Dresden, DOI: 10.1109/ASAP.2018.8445101
- Antonio Pullini, Davide Rossi, Igor Loi, Alfio Di Mauro, Luca Benini, "Mr.Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IoT Edge Processing", In Proc. European Solid State Circuits Conference (ESSCIRC) 2018, 3-6 Sep 2018, Dresden, DOI: 10.1109/ESSCIRC.2018.8494247
- Davide Schiavone, Davide Rossi, Alfio Di Mauro, Frank K. Gurkaynak, Timothy Saxe, Mao Wang, Ket Chong Yap, Luca Benini, "Arnold: an eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End-Nodes", arXiv: 2006.14256
- Alfio Di Mauro, Francesco Conti, Davide Schiavone, Davide Rossi, Luca Benini, "Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-Nodes Always-On 674uW @4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node", In IEEE Transactions on Circuits and Systems I: Regular Papers, Volume 67, Issue 11, November 2020, DOI: 10.1109/TCSI.2020.3012576
- Hayate Okuhara, Ahmed Elnaqib, Davide Rossi, Alfio Di Mauro, Philipp Mayer, Pierpaolo Plestri, Luca Benini, "An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes", IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, 2020, pp. 1-5, DOI: 10.1109/ISCAS45731.2020.9181081
- Angelo Garofalo, Gianmarco Ottavi, Alfio Di Mauro, Francesco Conti, Guiseppe Tagliavini, Luca Benini, Davide Rossi, "A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode", IEEE 47th European Solid State Circuits Conference (ESSCIRC 2021), DOI: 10.1109/ESSCIRC53450.2021.9567767
- Davide Rossi, Francesco Conti, Manuel Eggimann, Stefan Mach, Alfio Di Mauro, Marco Guermandi, Giuseppe Tagliavini, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini, "A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7uW Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode", In Proc. IEEE International Solid- State Circuits Conference (ISSCC) 2021, San Francisco, CA, USA, 2021, pp. 60-62, DOI: 10.1109/ISSCC42613.2021.9365939
- Angelo Garofalo, Matteo Perotti, Luca Valente, Yvan Tortorella, Alessandro Nadalini, Lica Benini, Davide Rossi, Francesco Conti, "DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training", IEEE Open Journal of the Solid-State Circuits Society, vol. 2, pp. 231-243, 2022, DOI: 10.1109/OJSSCS.2022.3210082
- Francesco Conti, Davide Rossi, Gianna Paulin, Angelo Garofalo, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Vincent Huard, Olivier Montfort, Lionel Jure, N. Exibart, Pascal Gouedo, Mathieu Louvat, E. Botte, Luca Benini, "A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing", International Solid-State Circuits Conference (ISSCC 2023)