Davide Rossi
[Pictures]
[Years]
[Designers]
[Applications]
[Packages]
[Full Table]
Designer for following chips
Publications related to the chips in the gallery
- Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank K. Gurkaynak, Andrea Bartolini, Philippe Flatresse, Luca Benini, "A 60 GOPS/W, -1.8 V to 0.9 V body bias ULP cluster in 28 nm UTBB FD-SOI technology", Journal of Solid-State Electronics, Volume 117, March 2016, Pages 170-184, DOI: 10.1016/j.sse.2015.11.015
- Marco Crescentini, Marco Biondi, Marco Bennati, Paolo Alberti, Giulia Luciani, Cinzia Tamburini, Matteo Pizotti, Aldo Romani, Marco Tartagni, David Bellasi, Davide Rossi, Luca Benini, Marco Marchesi, Domenicos Cristaudo, "A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 um BCD", Proceedings of the 42nd Eurpoean Solid-State Circuits Conference (ESSCIRC-2016), pp 393-396, DOI: 10.1109/ESSCIRC.2016.7598324
- Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank K. Gurkaynak, Adam Teman, Jeremy Constantin, Andreas Burg, Ivan Miro-Panades, Edith Beigne, Fabien Clermidy, Philippe Flatresse, Luca Benini, "Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster", IEEE Micro, vol. 37, no. 5, pp. 20-31, DOI: 10.1109/MM.2017.3711645
- Francesco Conti, Robert Schilling, Davide Schiavone, Antonio Pullini, Davide Rossi, Frank K. Gurkaynak, Michael Muehlberghuber, Michael Gautschi, Igor Loi, Germain Haougou, Stefan Mangard, Luca Benini, "An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol: 64, Issue: 9, Sept. 2017, pp 2481 - 2494, DOI: 10.1109/TCSI.2017.2698019
- Antonio Pullini, Francesco Conti, Davide Rossi, Igor Loi, Michael Gautschi, Luca Benini, "A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision", IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: PP, Issue: 99 ), 2017, DOI: 10.1109/TCSII.2017.2652982
- Davide Rossi, Antonio Pullini, Christoph Mueller, Igor Loi, Francesco Conti, Andreas Burg, Luca Benini, Philippe Flatresse, "A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors", IEEE Design & Test, vol. 34, no. 6, pp. 46-53, Dec. 2017, DOI: 10.1109/MDAT.2017.2750907
- Eric Flamand, Davide Rossi, Francesco Conti, Igor Loi, Antonio Pullini, Florent Rotenberg, Luca Benini, "GAP-8: A RISC-V SoC for AI at the Edge of the IoT", In Proc. IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, 2018, pp. 1-4,European Solid State Circuits Conference (ESSCIRC) 2018, 3-6 Sep 2018, Dresden, DOI: 10.1109/ASAP.2018.8445101
- Antonio Pullini, Davide Rossi, Igor Loi, Giuseppe Tagliavini, Luca Benini, "Mr.Wolf: An Energy-Precision Scalable Parallel Ultra Low Power SoC for IoT Edge Processing", In IEEE Journal of Solid-State Circuits, vol. 54, no. 7, pp. 1970-1981, July 2019, DOI: 10.1109/JSSC.2019.2912307
- Davide Schiavone, Davide Rossi, Alfio Di Mauro, Frank K. Gurkaynak, Timothy Saxe, Mao Wang, Ket Chong Yap, Luca Benini, "Arnold: an eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End-Nodes", in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 4, pp. 677-690, April 2021 arXiv: 2006.14256 10.1109/TVLSI.2021.3058162
- Alfio Di Mauro, Francesco Conti, Davide Schiavone, Davide Rossi, Luca Benini, "Always-On 674uW @4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node", In IEEE Transactions on Circuits and Systems I: Regular Papers, Volume 67, Issue 11, November 2020, DOI: 10.1109/TCSI.2020.3012576
- Hayate Okuhara, Ahmed Elnaqib, Martino Dazzi, Pierpaolo Plestri, Simone Benatti, Luca Benini, Davide Rossi, "A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 10, pp. 1800-1811, Oct. 2021, DOI: 10.1109/TVLSI.2021.3108806
- Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Alfio Di Mauro, Luca Benini, Davide Rossi, "Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode", IEEE Transactions on Circuits and Systems I: Regular Papers, DOI: 10.1109/TCSI.2023.3254810
- Davide Rossi, Francesco Conti, Manuel Eggimann, Alfio Di Mauro, Giuseppe Tagliavini, Stefan Mach, Marco Guermandi, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini, "Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode", in IEEE Journal of Solid-State Circuits, vol. 57, no. 1, pp. 127-139, Jan. 2022, DOI: 10.1109/JSSC.2021.3114881
- Angelo Garofalo, Yvan Tortorella, Matteo Perotti, Luca Valente, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti, "DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training", IEEE Open Journal of the Solid-State Circuits Society, vol. 2, pp. 231-243, 2022, DOI: 10.1109/OJSSCS.2022.3210082
- Mattia Sinigaglia, Luca Bertaccini, Luca Valente, Angelo Garofalo, Simone Benatti, Luca Benini, Francesco Conti, Davide Rossi, "ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays", IEEE International Symposium on Circuits and Systems (ISCAS 2023), 21-25 May 2023, Monterey CA, USA, DOI: 10.1109/ISCAS46773.2023.10181862
- Francesco Conti, Davide Rossi, Gianna Paulin, Angelo Garofalo, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Vincent Huard, Olivier Montfort, Lionel Jure, N. Exibart, Pascal Gouedo, Mathieu Louvat, E. Botte, Luca Benini, "A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing", International Solid-State Circuits Conference (ISSCC 2023)
- Luca Valente, Alessandro Nadalini, Asif Veeran, Mattia Sinigaglia, Bruno Sa, Nils Wistoff, Yvan Tortorella, Simone Benatti, Rafail Psiakis, Ari Kulmala Baker Mohammad, Sandro Pinto, Daniele Palossi, Luca Benini, Davide Rossi, "A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 71, no. 5, pp. 2266-2279, May 2024, DOI: 10.1109/TCSI.2024.3359044
- Arpan Prasad, Moritz Scherer, Davide Rossi, Alfio Di Mauro, Manuel Eggimann, Jorge Tomas Gomez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini, "Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS", IEEE 49th European Solid State Circuits Conference (ESSCIRC 2023), Lisbon, Portugal, 2023, pp. 217-220, DOI: 10.1109/ESSCIRC59616.2023.10268718