Matteo Perotti
[Pictures]
[Years]
[Designers]
[Applications]
[Packages]
[Full Table]
Designer for following chips
Publications related to the chips in the gallery
- Angelo Garofalo, Yvan Tortorella, Matteo Perotti, Luca Valente, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti, "DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training", IEEE Open Journal of the Solid-State Circuits Society, vol. 2, pp. 231-243, 2022, DOI: 10.1109/OJSSCS.2022.3210082
- Matteo Perotti, Matheus Cavalcante, Alessandro Ottaviano, Jiantao Liu, Luca Benini, "Yun: An Open-Source, 64-Bit RISC-V-Based Vector Processor With Multi-Precision Integer and Floating-Point Support in 65-nm CMOS", IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 10, pp. 3732-3736, Oct. 2023, DOI: 10.1109/TCSII.2023.3292579
- Angelo Garofalo, Alessandro Ottaviano, Matteo Perotti, Thomas Benz, Yvan Tortorella, Robert Balas, Michael Rogenmoser, Chi Zhang, Luca Bertaccini, Nils Wistoff, Maicol Ciani, Cyril Koenig, Mattia Sinigaglia, Luca Valente, Paul Scheffler, Manuel Eggimann, Matheus Cavalcante, Francesco Restuccia, Alessandro Bionda, Francesco Conti, Frank K. Gurkaynak, Davide Rossi, Luca Benini, "A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications", IEEE Transactions on Circuits and Systems II: Express Briefs, arXiv: 2502.18953, DOI: 10.1109/TCSII.2025.3591225